cameroon gce A level June 2024 computer science 2
cameroon gce A level June 2024 computer science 2
Using two’s complement, show how the following operations on the denary numbers could be performed jn
a 4-bit register:
(a) 5 – 4.
(0
b) -3 + 6. (4 marks)
(ii) Express the AND gate and the OR gate in terms of NAND gates only. (4 marks)
Explain how the width of the data bus and system clock speed affect the performance of a computer
(3 marks)
(iii) (a)
system.
The table below shows six stages in the fetch-execute cycle in a Von Neumann computer.
Put the stages into the correct sequence by writing the numbers 1 to 6 in the right-hand column.
In your answer booklet, reproduce this table, replacing each description on the left with its
(b)
corresponding letter (A to F). (3 marks)
Description of Stage Sequence Number
A. The instruction is copied from the Memory Data Register
(MDR) and placed in the Current Instruction Register (CIR).
B. The instruction is executed.
C. The instruction is decoded.
D. The address contained in the Program Counter (PC) is
copied to the Memory Address Register (MAR).
E. The value in the Program Counter (PC) is incremented so
that it points to the next instruction to be fetched.
F. The instruction in the memory location found in the Memory
Address Register (MAR) is copied into the Memory Data
Register (MDR).
Perform a 2 place logical right shift on the binary number 11001011. Convert the binary number obtained to
decimal and state the effect of performing a 2 place logical right shift on the binary number.
(iv)
(3 marks)
Consider the following assignment statement written in a high-level language, where A is an array, = the
assignment operator and array indexing starts with 0.
A[3] = A[2] + A[l]
Explain what is meant by an addressing mode. What is absolute addressing?
Using register and indexed addressing modes only, show how you would implement
the above statement in assembly. Assume that the base address of array A is stored in
a register R0, each array element occupies a single byte and other registers are named
Rl, R2,…. Rn, for some positive integer n. Explain any other notation you use in your answer.
